电子学报

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基于神经网络的重构指令预取机制及其可扩展架构

陈志坚, 孟建熠, 严晓浪, 沙子岩   

  1. 浙江大学超大规模集成电路设计研究所, 浙江杭州 310027
  • 收稿日期:2010-03-30 修回日期:2012-03-01 出版日期:2012-07-25 发布日期:2012-07-25
  • 作者简介:陈志坚 男,1984年7月出生于浙江洞头,2006年获浙江大学自动化学士学位,现为浙江大学超大规模集成电路设计研究所硕博连读生,主要研究方向为高性能嵌入式处理器设计,可重构处理器设计. E-mail:chenzj@vlsi.zju.edu.cn 孟建熠 男,讲师,1982年1月出生于浙江上虞,分别于2004年和2009获浙江大学电子信息工程学士和电路与系统博士,主要研究方向为高性能低功耗嵌入式处理器设计. E-mail:mengjy@vlsi.zju.edu.cn

Algorithm/Architecture of NN-Based Configuration Prefetching

CHEN Zhi-jian, MENG Jian-yi, YAN Xiao-lang, SHA Zi-yan   

  1. Institute of VLSI Design Zhejiang University, Hangzhou, Zhejiang 310027, China
  • Received:2010-03-30 Revised:2012-03-01 Online:2012-07-25 Published:2012-07-25

摘要: 针对动态可重构处理器的配置信息加载延时,提出了一种基于神经网络的可扩展的重构指令预取机制.增加感受器的历史指令信息,并结合感受器权重构建新型的感受器模型,通过权重与历史指令信息的协同训练学习重构指令调用规律.在处理器运行过程中,提前完成对后续重构指令的预测及配置信息的预取,隐藏指令重构成本.进一步提出了本方法的可扩展实现框架,神经网络的学习结果作为重构指令的关联信息,被移至内存并分布式存储.在重构指令预取时,完成对神经网络学习信息的加载.实验结果表明,该方法对重构指令的预测准确率达91%,综合性能平均提升40%.

关键词: 可重构处理器, 配置信息预取, 改进神经网络算法, 可扩展存储架构

Abstract: Reconfigurable processor suffers a severely performance loss from reconfiguration overhead.A NN(neural network algorithm) based configuration prefetching algorithm was proposed in this paper to reduce the overhead.Not only the receptor weight but also the history RFUOP ID constructs an advanced receptor model.The neural network studies the RFUOP trace through collaborative training of receptor weight and history RFUOP ID.With the learning result,the neural network predicts next RFUOPs and completes configuration prefetching,overlapping the configuration loading with the computation on the host processor.Furthermore,an extensible architecture for neural network storage was proposed.As a component of RFUOP,reception information is located on off-chip memory and linked to corresponding configuration field.Once configuration was prefetched,neuron information was loaded and computed for next prediction.Experiments show that the NN-based prefetching algorithm can reach 91% prediction accuracy,while gaining performance improving by 40% on average.

Key words: reconfigurable processor, configuration prefetch, advanced neural network algorithm, extensible architecture

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