电子学报 ›› 2009, Vol. 37 ›› Issue (2): 266-271.

• 论文 • 上一篇    下一篇

45nm低功耗、高性能Zipper CMOS 多米诺全加器设计

汪金辉1, 宫 娜2, 耿淑琴1, 侯立刚1, 吴武臣1, 董利民1   

  1. 1. 北京工业大学集成电路与系统研究室,北京 100022;2. 河北大学电子信息工程学院,河北保定 071002
  • 收稿日期:2008-02-27 修回日期:2008-06-04 出版日期:2009-02-25 发布日期:2009-02-25

Low Power and High Performance Zipper CMOS Domino Full-Adder Design in 45nm Technology

WANG Jin-hui1, GONG Na2, Geng Shu-qin1, HOU Li-gang1, WU Wu-chen1, DONG Li-min1   

  1. 1. VLSI and System Laboratory,Beijing University of Technology,Beijing 100022,China;2. College of Electronic and Informational Engineering,Hebei University,Baoding,Hebei 071002,China
  • Received:2008-02-27 Revised:2008-06-04 Online:2009-02-25 Published:2009-02-25

摘要: 提出了电荷自补偿技术,此技术利用P型多米诺电路动态结点的放电对N型多米诺电路的动态结点充电,并在此技术基础上综合应用双阈值技术和多电源电压技术,设计了新型低功耗、高性能Zipper CMOS多米诺全加器.仿真过程中提出了功耗分布法,精确找到了电荷自补偿技术的最优路径.仿真结果表明,在相同的时间延迟下,与标准Zipper CMOS多米诺全加器、双阈值Zipper CMOS多米诺全加器、多电源电压Zipper CMOS多米诺全加器相比,新型Zipper CMOS多米诺全加器动态功耗分别减小了37%、35%和7%,静态功耗分别减小了41%,20%和43%.最后,分析并得到了新型全加器漏电流最低的输入矢量和时钟状态.

关键词: 动态功耗, 静态功耗, 漏电流, Zipper CMOS多米诺全加器, 电荷自补偿技术

Abstract: A charge self-compensation techniques,based on the dynamic node of the P-type charging dynamic node of N-type,is proposed in this paper.Utilizing this technique,the dual-threshold voltage techniques and the multiple supply voltages techniques a low power and high performance Zipper CMOS domino full-adder is designed.And a novel method of the power distribution is introduced.With this method,the optimal path of the proposed Zipper CMOS full-adder with the charge self-compensation techniques is found accurately to minimize the power.Simulation results prove that active power of proposed Zipper CMOS full-adder can be reduced by up to 37%,5% and 7%,and static power can be reduced by up to 41%,20% and 43% as compared to the standard,the dual threshold voltage,and the multiple supply Zipper CMOS domino full-adder under similar delay time,respectively.At last,the inputs and clock signals combination sleep state dependent on leakage current characteristics is analyzed and the optimal sleep state is obtained.

Key words: active power, static power, leakage current, Zipper CMOS domino full-adder, charge self-compensation techniques

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