电子学报 ›› 2009, Vol. 37 ›› Issue (2): 305-311.

• 论文 • 上一篇    下一篇

一种多处理器原型及其系统芯片设计方法

黄 凯1, 殷 燎1, 林锋毅1, 葛海通2, 严晓浪1   

  1. 1. 浙江大学超大规模集成电路研究所,浙江杭州 310027;2. 杭州中天微系统有限公司,浙江杭州 310012
  • 收稿日期:2007-11-30 修回日期:2008-10-20 出版日期:2009-02-25 发布日期:2009-02-25

A Multiprocessor Prototype and Its SoC Design Methodology

HUANG Kai1, YIN Liao1, LIN Feng-yi1, GE Hai-tong2, YAN Xiao-lang1   

  1. 1. Institute of VLSI design,Zhejiang University,Hangzhou,Zhejiang 310027,China;2. C-Sky Microsystems Company,Hangzhou,Zhejiang 310012,China
  • Received:2007-11-30 Revised:2008-10-20 Online:2009-02-25 Published:2009-02-25

摘要: 随着嵌入式应用快速发展,系统芯片(SoC)设计日趋复杂.高效可靠的设计多处理器系统芯片逐渐成为一个巨大挑战.本文提出一种多处理器原型及其SoC设计方法,将多处理器及其通信统一建模于一个多层次、灵活和可配的软硬件原型中,通过分层次、从高层抽象到底层实现逐步深入的方法解决软硬件接口验证问题和完善软硬件架构.H.264解码实验证明多处理器原型功能可行性和物理可实现性.基于该原型的多层次细化方法可有效确保SoC软硬件设计的正确性,并有助于软硬件结构协同设计优化.

关键词: 多处理器原型, 系统芯片, 软硬件协同设计

Abstract: Fast development of embedded application drives the SoC design more complex.How to design multiprocessor SoC efficiently and reliably is becoming a challenge to the designers.To address this challenge,a new multiprocessor prototype and its SoC design methodology are proposed in this paper.It combines multi processors and their communication into one software-hardware prototype in different abstraction levels.The method of seamless refinement from high level abstraction to low level VLSI implementation can design and verify the software/hardware interface and improve designing software/hardware architecture efficiently.The experiment of H.264 decoder shows the feasibility of multiprocessor prototype in both function and physical implementation.The seamless refinement method based on this prototype can ensure the correctness of SoC design and be helpful for its software/hardware architecture optimization.

Key words: multi-processor prototype, System on Chip (SoC), software-hardware co-design

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