电子学报 ›› 2009, Vol. 37 ›› Issue (2): 362-366.

• 论文 • 上一篇    下一篇

面向访问需求的数据缓存泄漏功耗管理方法

王箫音, 佟 冬, 孙含欣, 程 旭   

  1. 北京大学微处理器研究开发中心,北京100871
  • 收稿日期:2008-03-17 修回日期:2008-05-30 出版日期:2009-02-25 发布日期:2009-02-25

An On-Demand Mechanism for Data Cache Leakage Power Management

WANG Xiao-yin, TONG Dong, SUN Han-xin, CHENG Xu   

  1. Microprocessor Research and Development Center of Peking University.Beijing 100871,China
  • Received:2008-03-17 Revised:2008-05-30 Online:2009-02-25 Published:2009-02-25

摘要: 本文提出面向访问需求的数据缓存泄漏功耗管理方法,根据访存指令对数据缓存的访问需求控制数据缓存的活动.当流水线中未发现访存指令时,将整个数据缓存保持在非活跃状态;而当发现访存指令进入流水线时,采用两种数据缓存访问控制策略以及对这两种策略的动态选择机制,在流水线早期捕获访存地址的访问需求,对数据缓存的活动作出精细控制.实验结果表明,在平均情况下,本文方法将数据缓存的泄漏功耗降低85.4%,而处理器性能提升4.41%,比传统方法在功耗与性能方面均达到更优结果.

关键词: 嵌入式处理器, 数据缓存, 泄漏功耗

Abstract: In this paper,we propose an on-demand mechanism for data cache leakage power management,which manages data cache activities according to the demand of memory accessing instructions.Specifically,this mechanism keeps the whole data array in leakage-saving mode whenever it finds no memory accessing instructions at all;once a load instruction is detected,it employs two data cache access control policies and the dynamic selection scheme to capture the access demand of the load address early in the pipeline.Experimental results demonstrate that the data cache leakage power is reduced by an average of 85.4%.Meanwhile,the performance is increased by 4.41%.Compared to traditional methods,the mechanism proposed in this paper achieves better results in both power and performance.

Key words: embedded processor, data cache, leakage power

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