Abstract：Principle and method for designing high voltage thin film SOI devices with linearly doped drift region are given.LDMOS transistors are fabricated on the SOI wafers with Si film of 0.15μm and buried oxide of 2μm.The dependence of breakdown voltages of the thin film SOI devices on the concentration gradient in the linearly doped drift region is experimentally investigated for the first time.Based on the optimization of the impurity dose in drift region,the breakdown voltage over 612V is observed in the SOI LDMOS transistors with 50μm drift region.
张盛东;韩汝琦;Tommy Lai;Johnny Sin. 漂移区为线性掺杂的高压薄膜SOI器件的研制[J]. 电子学报, 2001, 29(2): 164-167.
ZHANG Sheng-dong;HAN Ru-qi;Tommy Lai;Johnny Sin. Development of High Voltage Thin Film SOI Device with Linearly Doped Drift Region. Chinese Journal of Electronics, 2001, 29(2): 164-167.
2001, Vol. 29 
