Abstract：The random order execution which used in cryptographic ICs is a kind of few redundancy and low power countermeasures against power analysis attacks.The security is stronger with higher degree of uncertainty of timing.A data flow random executing AES encryption ASIC adopted the dynamic data flow architecture and served concurrent tokens randomly and sequentially.Its uncertainty was enhanced by increasing the number of order independent operations and batch arrival of tokens.A novel token hold-match-fetch structure was designed to complete the synchronization and random service control.Finally,all of the operations were random executing.That chip can resist 15,000 samples Correlation Power Analysis.Its energy consumption is less than the known AES circuits with other countermeasures.
李翔宇;孙义和. 采用数据流模式提高乱序执行密码芯片的安全性[J]. 电子学报, 2007, 35(2): 202-206.
LI Xiang-yu;SUN Yi-he. Improve the Security of Random Executing Encryption ICs by the Data Flow Mode. Chinese Journal of Electronics, 2007, 35(2): 202-206.
2007, Vol. 35 
