A Programming Language for Rapid Design of High Performance Signed Multiplier Circuits

JIAO Ji-ye, MU Rong, HAO Yue

ACTA ELECTRONICA SINICA ›› 2013, Vol. 41 ›› Issue (11) : 2256-2261.

PDF(1884 KB)
CIE Homepage  |  Join CIE  |  Login CIE  |  中文 
PDF(1884 KB)
ACTA ELECTRONICA SINICA ›› 2013, Vol. 41 ›› Issue (11) : 2256-2261. DOI: 10.3969/j.issn.0372-2112.2013.11.023

A Programming Language for Rapid Design of High Performance Signed Multiplier Circuits

    {{javascript:window.custom_author_en_index=0;}}
  • {{article.zuoZhe_EN}}
Author information +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

QR code of this article

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations
{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2013, 41(11): 2256-2261. https://doi.org/10.3969/j.issn.0372-2112.2013.11.023

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}
{{article.copyrightLicense_en}}
PDF(1884 KB)

Accesses

Citation

Detail
Sections
Recommended
Copyright © ACTA ELECTRONICA SINICA, All Rights Reserved.
E-mail：new@ejournal.org.cn
Powered by Beijing Magtech Co. Ltd,.
Copyright © ACTA ELECTRONICA SINICA, All Rights Reserved.

/

〈 〉