FPGA Design of Real-Time Blind Source Separation for AIS Multi-cell Co-channel Signals

doi:10.3969/j.issn.0372-2112.2017.09.010

TANG Ran, WU Hong, ZHAO Ying-xin, MU Wei-wei, XU Xi-yan, MA Xiao-xu, LIU Bing, LIU Zhi-yang

ACTA ELECTRONICA SINICA ›› 2017, Vol. 45 ›› Issue (9) : 2121-2126.

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ACTA ELECTRONICA SINICA ›› 2017, Vol. 45 ›› Issue (9) : 2121-2126. DOI: 10.3969/j.issn.0372-2112.2017.09.010

FPGA Design of Real-Time Blind Source Separation for AIS Multi-cell Co-channel Signals

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2017, 45(9): 2121-2126. https://doi.org/10.3969/j.issn.0372-2112.2017.09.010

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Received	Revised	Published
2016-01-27	2016-05-11	2017-09-25
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2017-09-25

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