Implementation of a 12-bit 40-MS/s Sample-and-Hold Circuit with a Ring Amplifier

doi:10.3969/j.issn.0372-2112.2017.12.009

WEI Zi-hui, HUANG Shui-long, SHAN Qiang

Acta Electronica Sinica ›› 2017, Vol. 45 ›› Issue (12) : 2890-2895.

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Acta Electronica Sinica ›› 2017, Vol. 45 ›› Issue (12) : 2890-2895. DOI: 10.3969/j.issn.0372-2112.2017.12.009

Implementation of a 12-bit 40-MS/s Sample-and-Hold Circuit with a Ring Amplifier

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2017, 45(12): 2890-2895 https://doi.org/10.3969/j.issn.0372-2112.2017.12.009

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Received	Revised	Published
2016-07-15	2017-06-14	2017-12-25
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2017-12-25

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