DFT Filter Bank-Based Realization of Low Delay Speech Processing on FPGA

doi:10.3969/j.issn.0372-2112.2018.03.027

XUE Yi-ming, CHEN Yao, HE Ning-ning, HU Cai-e, WANG Jian-ping

ACTA ELECTRONICA SINICA ›› 2018, Vol. 46 ›› Issue (3) : 695-701.

PDF(1074 KB)

ACTA ELECTRONICA SINICA ›› 2018, Vol. 46 ›› Issue (3) : 695-701. DOI: 10.3969/j.issn.0372-2112.2018.03.027

DFT Filter Bank-Based Realization of Low Delay Speech Processing on FPGA

{{article.zuoZhe_EN}}

Author information +

History +

HeighLight

Abstract

Key words

QR code of this article

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations

{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2018, 46(3): 695-701. https://doi.org/10.3969/j.issn.0372-2112.2018.03.027

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

Funding

RIGHTS & PERMISSIONS

PDF(1074 KB)

Accesses

Citation

Detail

Sections

Recommended

Received	Revised	Published
2017-01-03	2017-11-26	2018-03-25
Issue Date
2018-03-25

Please choose a citation manager

Content to export