Background Calibration Technology for High Speed Time-Interleaved ADC Based on FPGA

doi:10.3969/j.issn.0372-2112.2018.08.030

BAI Wen-shuai, WU Jin, WU Dan-yu, ZHOU Lei, WU Meng-long

ACTA ELECTRONICA SINICA ›› 2018, Vol. 46 ›› Issue (8) : 2020-2025.

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ACTA ELECTRONICA SINICA ›› 2018, Vol. 46 ›› Issue (8) : 2020-2025. DOI: 10.3969/j.issn.0372-2112.2018.08.030

Background Calibration Technology for High Speed Time-Interleaved ADC Based on FPGA

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2018, 46(8): 2020-2025. https://doi.org/10.3969/j.issn.0372-2112.2018.08.030

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Received	Revised	Published
2017-02-03	2018-03-01	2018-08-25
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2018-08-25

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