A Sequential Circuit Buffer Insertion Algorithm for Yield Improvement of Chips

JI Xiao-liang, TONG Xing-yuan, WU Rui-zhen, DU Ming

ACTA ELECTRONICA SINICA ›› 2018, Vol. 46 ›› Issue (12) : 2964-2969.

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ACTA ELECTRONICA SINICA ›› 2018, Vol. 46 ›› Issue (12) : 2964-2969. DOI: 10.3969/j.issn.0372-2112.2018.12.020

A Sequential Circuit Buffer Insertion Algorithm for Yield Improvement of Chips

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2018, 46(12): 2964-2969. https://doi.org/10.3969/j.issn.0372-2112.2018.12.020

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