Simulation of the Parasitic Interconnect Capacitance in the DRAM with the Stacked Structures

Simulation of the Parasitic Interconnect Capacitance in the DRAM with the Stacked Structures

LI Yi;WANG Ze-yi;HOU Jin-song

ACTA ELECTRONICA SINICA ›› 2000, Vol. 28 ›› Issue (11) : 29-31.

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PDF(112 KB)

ACTA ELECTRONICA SINICA ›› 2000, Vol. 28 ›› Issue (11) : 29-31.

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Simulation of the Parasitic Interconnect Capacitance in the DRAM with the Stacked Structures

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2000, 28(11): 29-31.

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