Parallel Array VLSI Architecture Design of 2-D DWT for JPEG2000

LAN Xu-guang;ZHENG Nan-ning;MEI Kui-zhi;LIU Yue-hu

Acta Electronica Sinica ›› 2004, Vol. 32 ›› Issue (11) : 1806-1809.

PDF(280 KB)
CIE Homepage  |  Join CIE  |  Login CIE  |  中文 
PDF(280 KB)
Acta Electronica Sinica ›› 2004, Vol. 32 ›› Issue (11) : 1806-1809.
论文

Parallel Array VLSI Architecture Design of 2-D DWT for JPEG2000

    {{javascript:window.custom_author_en_index=0;}}
  • {{article.zuoZhe_EN}}
Author information +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

QR code of this article

Cite this article

Download Citations
{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2004, 32(11): 1806-1809

References

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}
{{article.copyrightLicense_en}}
PDF(280 KB)

Accesses

Citation

Detail

Sections
Recommended

/