Simultaneous Routing and Buffer Insertion Under Fixed Buffer Locations Based on Accurate Delay Models

Simultaneous Routing and Buffer Insertion Under Fixed Buffer Locations Based on Accurate Delay Models

ZHANG Yi-qian, HONG Xian-long, CAI Yi-ci

ACTA ELECTRONICA SINICA ›› 2005, Vol. 33 ›› Issue (5) : 783-787.

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PDF(231 KB)

ACTA ELECTRONICA SINICA ›› 2005, Vol. 33 ›› Issue (5) : 783-787.

Simultaneous Routing and Buffer Insertion Under Fixed Buffer Locations Based on Accurate Delay Models

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2005, 33(5): 783-787.

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