A Reconfigurable Architecture for High-Speed Implementations of DES,3DES and AES

A Reconfigurable Architecture for High-Speed Implementations of DES,3DES and AES

GAO Na-na;LI Zhan-cai;WANG Qin

ACTA ELECTRONICA SINICA ›› 2006, Vol. 34 ›› Issue (8) : 1386-1390.

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PDF(236 KB)

ACTA ELECTRONICA SINICA ›› 2006, Vol. 34 ›› Issue (8) : 1386-1390.

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A Reconfigurable Architecture for High-Speed Implementations of DES,3DES and AES

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2006, 34(8): 1386-1390.

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