Network-on-Chip Topology Optimizations:Floor-plan and Routing on Discrete Plane

Network-on-Chip Topology Optimizations:Floor-plan and Routing on Discrete Plane

MA Li-wei, SUN Yi-he

ACTA ELECTRONICA SINICA ›› 2007, Vol. 35 ›› Issue (5) : 906-911.

PDF(347 KB)

PDF(347 KB)

ACTA ELECTRONICA SINICA ›› 2007, Vol. 35 ›› Issue (5) : 906-911.

Network-on-Chip Topology Optimizations:Floor-plan and Routing on Discrete Plane

{{article.zuoZhe_EN}}

Author information +

History +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

QR code of this article

Cite this article

Download Citations

{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2007, 35(5): 906-911.

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}

{{article.copyrightLicense_en}}

PDF(347 KB)

Accesses

Citation

Detail

Sections

Recommended

/

〈

〉