A Verilog-A Behavioral Model for SET Based on the Master Equation Method

A Verilog-A Behavioral Model for SET Based on the Master Equation Method

LU Gang;WEI Fen-fen

ACTA ELECTRONICA SINICA ›› 2009, Vol. 37 ›› Issue (2) : 342-346.

PDF(515 KB)

PDF(515 KB)

ACTA ELECTRONICA SINICA ›› 2009, Vol. 37 ›› Issue (2) : 342-346.

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A Verilog-A Behavioral Model for SET Based on the Master Equation Method

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2009, 37(2): 342-346.

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