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A High-Performance Reconfigurable Multi-Transform VLSI Architecture for H.264 CODEC
更新时间：2025-07-02

    • A High-Performance Reconfigurable Multi-Transform VLSI Architecture for H.264 CODEC

    • Acta Electronica Sinica   Vol. 37, Issue 4, Pages: 673-677(2009)

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  • A High-Performance Reconfigurable Multi-Transform VLSI Architecture for H.264 CODEC[J]. Acta Electronica Sinica, 2009, 37(4): 673-677. DOI：

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