A Low Complex Parallel Implementation of Turbo Decoding

ZHANG Zhong-pei; ZHOU Liang; JIN Fan

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A Low Complex Parallel Implementation of Turbo Decoding

更新时间：2025-07-16

- A Low Complex Parallel Implementation of Turbo Decoding
- Acta Electronica Sinica Vol. 29, Issue 2, Pages: 272-274(2001)
- 作者机构：
  
  1. 电子科技大学通信与信息工程学院,成都,610054
  2. 西南交通大学计算机与通信工程学院,成都,610031
  3. 电子科技大学通信与信息工程学院成都,610054
  4. 西南交通大学计算机与通信工程学院成都,610031
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN911.22
- Published：2001
- 稿件说明：
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ZHANG Zhong-pei, ZHOU Liang, JIN Fan. A Low Complex Parallel Implementation of Turbo Decoding[J]. Acta Electronica Sinica, 2001, 29(2): 272-274.
DOI：

ZHANG Zhong-pei, ZHOU Liang, JIN Fan. A Low Complex Parallel Implementation of Turbo Decoding[J]. Acta Electronica Sinica, 2001, 29(2): 272-274. DOI：

摘要

MAX-LOG-MAP是Turbo码译码算法的简化算法

本文提出了该算法的并行阵列集成电路实现结构

给出阵列的数据流向和译码算法在阵列中的计算过程

分析了阵列结点联接关系和数据存贮结构

以及数据运算之间的简单时序关系.通过计算机仿真

证明了这种并行实现结构的正确性.

Abstract

The Max-Log-MAP algorithm (MLM) is a simplified version for the decoding of Turbo codes.Architecture of parallel array is suggested based on the MLM algorithm and is easy to implement by VLSI.The data flow directions and the computation procedures of the algorithm structure are obtained

the relations among the nodes and data frames are analyzed and the simple time sequencing of data operations are given.The architecture is justified by computer simulation.

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