Timing-Driven Placement Algorithm for Very Large Integrated Circuits

WU Wei-min; HONG Xian-long; Cai Yi-ci; GU Jun

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Timing-Driven Placement Algorithm for Very Large Integrated Circuits

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- Timing-Driven Placement Algorithm for Very Large Integrated Circuits
- Acta Electronica Sinica Vol. 29, Issue 8, Pages: 1018-1022(2001)
- 作者机构：
  
  1. 清华大学计算机科学与技术系,北京,100084
  2. 香港科技大学计算机科学系,香港
  3. 清华大学计算机科学与技术系北京,100084
  4. 香港科技大学计算机科学系香港
- 作者简介：
- 基金信息：
- DOI：
  CLC： TP302
- Published：2001
- 稿件说明：
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WU Wei-min, HONG Xian-long, Cai Yi-ci, et al. Timing-Driven Placement Algorithm for Very Large Integrated Circuits[J]. Acta Electronica Sinica, 2001, 29(8): 1018-1022.
DOI：

WU Wei-min, HONG Xian-long, Cai Yi-ci, et al. Timing-Driven Placement Algorithm for Very Large Integrated Circuits[J]. Acta Electronica Sinica, 2001, 29(8): 1018-1022. DOI：

摘要

本文针对甚大规模集成电路的时延驱动布局问题提出了一个新的解决途径

其策略是将结群技术应用于二次规划布局过程中.结群的作用是可大幅度地降低布局部件的数量.本文设计了一个高效的结群算法CARGO

其优点是具有全局最优性并且运行速度很快.采用了一个基于路径的时延驱动二次规划布局算法对结群后的电路完成布局过程.由于二次规划布局算法能够在很短时间内寻找到全局最优解

故本文的算法更有希望彻底解决甚大规模电路的布局问题.在一组MCMC标准测试电路上对算法进行了测试

得到了满意的结果.

Abstract

A novel approach for timing-driven placement of very large integrated circuits is presented.Our strategy is to apply clustering technique to a quadratic placement procedure.By clustering

the number of components for placement is reduced considerably.We design a high-efficiency clustering algorithm

named CARGO

which has global optimality and runs very fast.We use a path-based timing-driven quadratic placement algorithm to complete the placement of the condensed circuit.Because quadratic based placement algorithm can mathematically find global optima in very short time

our new approach might be more promising for solving the problem thoroughly.We have tested our algorithm on a set of MCNC circuits and obtained satisfactory results.

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