This paper describes the design of a multi-channel high speed HDLC data processor which can process 128 logic channel HDLC data simultaneously.Its logic function and communication protocol coherence have been verified successfully by real-time operation system——vxWorks through FPGA.In the system

this multi-channel HDLC processor connects with 8 E1 physical links

and all 128 logic channel data separated from 256 timeslots of 8 E1 frames are processed by this single HDLC processor using time multiplex technology.Compared with other communication chips of this type

the above circuit structure takes more advantages in chip resources' taking up and channel management.