An Efficient Method to Analyze Signal Integrity in High-Speed Clock Circuit WEI Jing-he1,CHEN Jun-ning1,KE Dao-ming1,WU Jian-hui2,LU Sheng-li 2

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An Efficient Method to Analyze Signal Integrity in High-Speed Clock Circuit WEI Jing-he¹,CHEN Jun-ning¹,KE Dao-ming¹,WU Jian-hui²,LU Sheng-li2

更新时间：2025-07-16

- An Efficient Method to Analyze Signal Integrity in High-Speed Clock Circuit WEI Jing-he¹,CHEN Jun-ning¹,KE Dao-ming¹,WU Jian-hui²,LU Sheng-li2
- Acta Electronica Sinica Vol. 32, Issue 2, Pages: 335-337(2004)
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  CLC： TN4
- Published：2004
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An Efficient Method to Analyze Signal Integrity in High-Speed Clock Circuit WEI Jing-he¹,CHEN Jun-ning¹,KE Dao-ming¹,WU Jian-hui²,LU Sheng-li2[J]. Acta Electronica Sinica, 2004, 32(2): 335-337.
DOI：

An Efficient Method to Analyze Signal Integrity in High-Speed Clock Circuit WEI Jing-he¹,CHEN Jun-ning¹,KE Dao-ming¹,WU Jian-hui²,LU Sheng-li2[J]. Acta Electronica Sinica, 2004, 32(2): 335-337. DOI：

摘要

本文基于有耗传输线模型

运用等效源理论首次分析了工作在GHz频率时时钟树电路互连系统对传输信号完整性的影响

对时钟树的'

’型结构引入三端口网络

计算结果表明这是一种有效的分析时钟树电路信号完整性的方法.

Abstract

The equivalent source theory based on lossy transmission line model is used to analyze the interconnect effect for propagating signal integrity in clock circuit which is operated at GHz frequency.Simultaneously three-port network is brought to the "

" structure in clock tree

the result shows this is an efficient method to analyze the signal integrity in clock tree.

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Related Institution

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