A 10Gb/s limiting amplifier for SDH STM-64 optical receiver is realized in 0.18μm CMOS technology.A modified Cherry
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Hooper architecture is employed to achieve a higher gain-bandwidth product.The measured results demonstrate an input dynamic range of 42dB (3.2mV~500mV) with constant output swing 250mV.The highest bit rate can be achieved is up to 12Gb/s with a small-signal input.The power dissipation is 110mW with the supply voltage of 1.8V.The chip area is 0.7mm×0.9mm.