The Buffer Structure and Scheduling Algorithm for Maintaining Packet Order in the Parallel Switch

LAN Ju-long; DONG Yu-guo; CHEN Yue; WEN Jian-hua

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The Buffer Structure and Scheduling Algorithm for Maintaining Packet Order in the Parallel Switch

更新时间：2025-07-16

- The Buffer Structure and Scheduling Algorithm for Maintaining Packet Order in the Parallel Switch
- Acta Electronica Sinica Vol. 32, Issue S1, Pages: 35-38(2004)
- 作者机构：
  
  1. 郑州信息工程大学国家数字交换系统工程技术研究中心,河南,郑州,450002
  2. 空军工程大学电讯工程学院,陕西,西安,710077
  3. 郑州信息工程大学国家数字交换系统工程技术研究中心,河南,郑州,450002
  4. 空军工程大学电讯工程学院,陕西,西安,710077
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN919.21
- Published：2004
- 稿件说明：
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LAN Ju-long, DONG Yu-guo, CHEN Yue, et al. The Buffer Structure and Scheduling Algorithm for Maintaining Packet Order in the Parallel Switch[J]. Acta Electronica Sinica, 2004, 32(S1): 35-38.
DOI：

LAN Ju-long, DONG Yu-guo, CHEN Yue, et al. The Buffer Structure and Scheduling Algorithm for Maintaining Packet Order in the Parallel Switch[J]. Acta Electronica Sinica, 2004, 32(S1): 35-38. DOI：

摘要

并行交换结构的并行工作原理和负载平衡特性使得属于同一流的分组或者信元被分散到多个交换模块进行处理

在输出端口它们的先后顺序无法得到保证.为了解决该问题

本文提出一种支持包保序的新技术

包括两级虚拟输入排队(VIQ)结构和包保序轮询(SKRR)调度算法

并且从理论上分析了这种新技术的吞吐率和时延性能.

Abstract

Due to the parallelism and load balancing of parallel switches

the packets (or cells) within the same flow will be spread into several low speed switching fabrics for processing.When these packets are sent to the output

however

their sequence can not be guaranteed.For keeping packet order

this paper proposes a novel technique that includes the buffer structure of two stage Virtu al Input Queues (VIQ) and the scheduling algorithm named sequence keeping round robin (SKRR).The throughput and average delay performance of the technique are also analyzed.

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