Three efficient FSBM motion estimation systolic array architectures for search range

P=KN(K≥1)

P=N/2

and

P=N

and are proposed in this paper

based on mapping the standard six-level nested Do-loop FSBM algorithm into a two-level nested Do-loop algorithm equivalently.These new architectures not only support frame-level pipelined operation

but also achieve nearly 100% processor utilization

require much fewer input pin count and hardware overhead.As such

these architectures offer a feasible solution for Digital TV and HDTV video picture format.