A H.264 Intra Prediction Mode Decision Algorithm and VLSI Implementation

HUANG Kai; QIN Xing; YAN Xiao-lang; GE Hai-tong

您当前的位置：

首页 >

文章列表页 >

A H.264 Intra Prediction Mode Decision Algorithm and VLSI Implementation

更新时间：2025-07-16

- A H.264 Intra Prediction Mode Decision Algorithm and VLSI Implementation
- Acta Electronica Sinica Vol. 35, Issue 2, Pages: 207-211(2007)
- 作者机构：
  
  浙江大学超大规模集成电路设计研究所,浙江,杭州,310027
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN919.81
- Published：2007
- 稿件说明：
移动端阅览
HUANG Kai, QIN Xing, YAN Xiao-lang, et al. A H.264 Intra Prediction Mode Decision Algorithm and VLSI Implementation[J]. Acta Electronica Sinica, 2007, 35(2): 207-211.
DOI：

HUANG Kai, QIN Xing, YAN Xiao-lang, et al. A H.264 Intra Prediction Mode Decision Algorithm and VLSI Implementation[J]. Acta Electronica Sinica, 2007, 35(2): 207-211. DOI：

摘要

17种预测模式和率失真优化模式判决极大的增加了H.264帧内编码器硬件设计的复杂度.目前的模式判决快速算法能大量减少模式判决的复杂度

但却不易于硬件实现.本文在Sobel边缘检测模式判决算法的基础上

提出了一种面向VLSI实现的模式判决优化算法.该算法通过修改16×16宏块部分像素的Sobel边缘检测算子来减少存储器读取次数

优化预测模式区域的范围来减少硬件设计复杂度

并采用变换后残差绝对值和(SATD)来简化编码代价判决运算.实验结果表明

采用该算法的帧内硬件编码器可以在确保编码质量的前提下

显著降低硬件实现复杂度和提高编码器效率.

Abstract

The complexity of H.264 hardware intra encoder is remarkable due to 17 prediction modes and Rate-distortion optimization mode decision.Although reduce coding complexity greatly

most of current intra prediction mode decision algorithms are hard to implement in hardware.A new mode decision algorithm for VLSI implementation is proposed based on Sobel edge detection mode decision algorithm.Our algorithm decreases memory bandwidth by modifying Sobel edge detector of part pixels

reduces hardware design complexity by optimizing mode region range

and simplifies cost computations of each prediction mode by using SATD.The results of experiment and hardware design show that our algorithm can greatly reduce the complexity of hardware implementation and significantly improve the efficiency of coder while coding quality is decreased slightly.

关键词

Keywords

references

Views

1021

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

A Novel Scheme for Fast Mode Decision within H.264

Design of a Highly Parallel and Double-Level Pipelined CAVLC Encoder for H.264

An Efficient Reconfigurable VLSI Architecture for H.264 High Profile Inverse Transform

Optimization on Motion Estimation Algorithm Based on H.264

Related Author

ZHU Hong

WU Cheng-ke

FANG Yong

FONT

WANG Hui

YANG Hua-zhong

WEI Ding-li

QIAO Fei

Related Institution

National Key Lab on ISN,Xidian University

Department of Electronic Engineering, Tsinghua University

Tsinghua National Laboratory for Information Science and Technology

ShenZhen Graduate SchoolPeking UniversityShenzhenGuangdong 518055China

Microprocessor Research and Development CenterPeking UniversityBeijing 100871China

⁰