Lattice digital filter chips are widely used in many signal processing applications.We propose a built-in self-test (BIST) scheme for VLSI pipelined lattice digital filter chips which needs no modification of the basic building cells and all the single stuck-at faults can be detected in reasonable time.All the test vectors can be generated by simple arithmetic operation.By reusing available arithmetic function units such as accumulators to generate test vectors and compact test responses

such scheme can be implemented at-speed with minimum hardware overhead and performance degradation.