Inverse Transform Architecture for VC1 Adaptive Block Size

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- Inverse Transform Architecture for VC1 Adaptive Block Size
- Acta Electronica Sinica Vol. 37, Issue 2, Pages: 419-423(2009)
- 作者机构：
  
  1. 浙江大学城市学院,浙江,杭州,310015
  2. 浙江大学信息学院,浙江,杭州,310027
  3. 浙江大学城市学院浙江杭州,310015
  4. 浙江大学信息学院浙江杭州,310027
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN919.81
- Published：2009
- 稿件说明：
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FANG Jian, ZHANG Ding, WANG Kuang. Inverse Transform Architecture for VC1 Adaptive Block Size[J]. Acta Electronica Sinica, 2009, 37(2): 419-423.
DOI：

FANG Jian, ZHANG Ding, WANG Kuang. Inverse Transform Architecture for VC1 Adaptive Block Size[J]. Acta Electronica Sinica, 2009, 37(2): 419-423. DOI：

针对VC1的四种自适应反变换模式

文章提出了一种基于8×8块的反变换结构.利用VC1变换矩阵的对称性

通过数据块重构

四种反变换模式统一为相同的结构

大大简化了硬件设计.文章同时提出了硬件实现结构

在满足应用要求的同时

有效减小了硬件规模.实验仿真表明

在108MHz工作频率下

能够有效支持标清和高清图像实时解码的反变换运算.

A unified inverse transform architecture based on 8×8block for Video Codec One standard is proposed in this paper.With the data reconstruction

four different inverse transforms mode could use the same architecture

which made the hardware design easy.At the same time

an inverse transform hardware architecture is proposed with less hardware resource.The experiment showed that when clocked at 108MHz

the proposed design could perform real-time inverse transform for standard definition and high definition video decoder.

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