An Algorithm for Regularity Extraction in Digital Integrated Circuits Based on Fan-Like Template

PAN Wei-tao; XIE Yuan-bin; HAO Yue; SHI Jiang-yi

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An Algorithm for Regularity Extraction in Digital Integrated Circuits Based on Fan-Like Template

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- An Algorithm for Regularity Extraction in Digital Integrated Circuits Based on Fan-Like Template
- Acta Electronica Sinica Vol. 38, Issue 1, Pages: 199-203(2010)
- 作者机构：
  
  西安电子科技大学微电子学院宽禁带半导体材料与器件教育部重点实验室,陕西,西安,710071
- 作者简介：
- 基金信息：
- DOI：
  CLC： TP391.72
- Published：2010
- 稿件说明：
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PAN Wei-tao, XIE Yuan-bin, HAO Yue, et al. An Algorithm for Regularity Extraction in Digital Integrated Circuits Based on Fan-Like Template[J]. Acta Electronica Sinica, 2010, 38(1): 199-203.
DOI：

PAN Wei-tao, XIE Yuan-bin, HAO Yue, et al. An Algorithm for Regularity Extraction in Digital Integrated Circuits Based on Fan-Like Template[J]. Acta Electronica Sinica, 2010, 38(1): 199-203. DOI：

摘要

将数据挖掘方法用于数字集成电路规律性提取，提出了一种扇形结构模板的规律性提取算法.采用压缩式存储及删除缓冲器结构等方法，降低了电路的存储空间.通过边权值编码，实现了逐级产生扇形频繁子电路的算法，解决了传统算法对大规模数字集成电路规律性提取时间复杂度过高的问题.实验结果表明该算法比SPOG与TREE算法更能充分提取电路的规律性，规律性提取时间更短.

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