CAO Peng, WANG Ming-fei, FEI Yuan-chun. Research on the Lower Limits of Power-Law-Integral for Estimating Jitter of the High-Stability Clocks[J]. Acta Electronica Sinica, 2010, 38(12): 2846-2849.
DOI:
CAO Peng, WANG Ming-fei, FEI Yuan-chun. Research on the Lower Limits of Power-Law-Integral for Estimating Jitter of the High-Stability Clocks[J]. Acta Electronica Sinica, 2010, 38(12): 2846-2849.DOI:
Research on the Lower Limits of Power-Law-Integral for Estimating Jitter of the High-Stability Clocks
The power-law-integral is a commonly formula used to estimate the subpicosecond level jitter of clocks
while the results are determined by the integral-limits
in particular
by the lower limits.The transform formulas from phase noise to jitter are introduced firstly.Then we deduced quantitative relationship between the lower limits
the frequency of sampling clock
the maximum frequency of analog input signals and the effective resolution of analog-to-digital converters
as a result
we provide a formula to estimate the lower limits.Finally
provides a typical application example of the formula.