The architecture-independent hot trace extraction method is presented

with which the processor architecture-independent trace co-processor synthesis is achieved by promoting trace-based HW/SW partitioning from the level of machine instruction to that of control data flow graph of intermediate code.To support trace predication in cyclic structure for better average hit rate

hash-signature based trace predication is proposed.Based on the above work

a processor-independent co-processor synthesis method is implemented

which can be seamlessly integrated with the hardware and software development process as a system-level design optimization tools.The experiment reveals that the result system performance is increased by 22.6% over instruction trace based method.