LU Xiao-feng, LIU Feng, TONG Dong, et al. An Efficient Reconfigurable VLSI Architecture for H.264 High Profile Inverse Transform[J]. Acta Electronica Sinica, 2011, 39(5): 1072-1076.
DOI:
LU Xiao-feng, LIU Feng, TONG Dong, et al. An Efficient Reconfigurable VLSI Architecture for H.264 High Profile Inverse Transform[J]. Acta Electronica Sinica, 2011, 39(5): 1072-1076.DOI:
An Efficient Reconfigurable VLSI Architecture for H.264 High Profile Inverse Transform
H.264 High Profile proposes the new 8×8 integer transform which achieves average bit-rate reduction of around 10% for HD material.This paper presents an efficient architecture for H.264 multiple block-size inverse transform.2-D transform decomposition and common matrix operation extraction were applied to design general processing elements to simplify the implementation of transforms.The proposed architecture is both area-efficient (4807gates) and high performance (can provide real-time decoding of 4096×2048@60fps High Profile in 150MHz
1.2G pixels/s data throughput rate
using TSMC 0.13 μm).This paper supporting all of the H.264 high profile transforms is the most efficient one
compared with the existing designs with the Data Throughput rate per Unit Area (DTUA) adopted as the comparison index.