您当前的位置:
首页 >
文章列表页 >
Petri-Net and GA-Based Approach to Modeling and Optimize for Semiconductor Wafer Fabrication
更新时间:2025-07-16
    • Petri-Net and GA-Based Approach to Modeling and Optimize for Semiconductor Wafer Fabrication

    • Acta Electronica Sinica   Vol. 38, Issue 2, Pages: 340-344(2010)
    • CLC: TP273
    • Published:2010

    移动端阅览

  • FONT face, Verdana, CAO Zheng-cai, et al. Petri-Net and GA-Based Approach to Modeling and Optimize for Semiconductor Wafer Fabrication[J]. Acta Electronica Sinica, 2010, 38(2): 340-344. DOI:

  •  
  •  
icon
试读结束,您可以激活您的VIP账号继续阅读。
去激活 >
icon
试读结束,您可以通过登录账户,到个人中心,购买VIP会员阅读全文。
已是VIP会员?
去登录 >

0

Views

2410

下载量

7

CSCD

Alert me when the article has been cited
提交
Tools
Download
Export Citation
Share
Add to favorites
Add to my album

Related Articles

Research Progress of Modeling Methods and Scheduling Strategies for Semiconductor Wafer Fabrication
Genetic Algorithm Based MIMO Equalization Parameter Optimization Technology for Mode-Division Multiplexed System
An Absorbing Structure Covering the Whole UHF Band
A Consortium Blockchain Based Reliable Task Offloading Approach in Edge Computing
An Approach to Multi-Path Coverage Testing Based on Key Edge Probability and Path Layer Proximity

Related Author

CAO Zheng-cai
QIAO Fei
WU Qi-di
ZHAO Tian-feng
WEN Feng
FENG Bian-xia
WU Bao-jian
XU Bo

Related Institution

CIMS Research Center,Tongji University
Key Laboratory of Optical Fiber Sensing and Communication Networks, Ministry of Education, University of Electronics Science and Technology of China
School of Electronics and Information, Northwestern Polytechnical University
Key Laboratory for Novel Software Technology, Nanjing University
Guangdong Provincial Laboratory of Artificial Intelligence and Digital Economy
0