WU Zhi-Bo, ZHANG Zhong-ping, CHEN Ju-ping, et al. The Implementation of Range-Gate Control Circuit With High-Repetition-Rate Based on FPGA[J]. Acta Electronica Sinica, 2010, 38(4): 919-0922.
DOI:
WU Zhi-Bo, ZHANG Zhong-ping, CHEN Ju-ping, et al. The Implementation of Range-Gate Control Circuit With High-Repetition-Rate Based on FPGA[J]. Acta Electronica Sinica, 2010, 38(4): 919-0922.DOI:
The Implementation of Range-Gate Control Circuit With High-Repetition-Rate Based on FPGA
<FONT face=Verdana>The operating frequency and precision of traditional range-gate control circuits designed with discrete components are hard to satisfy the demand of high-repetition-rate measurement. By analyzing the timing sequences of high-repetition-rate range gate
a method based on FPGA is proposed and implemented. This method makes full use of FPGA advantages at calculating
storage and clock managing
200MHz Clock generated by DCM (Digital Clock Manager) results in the circuit with 5ns resolution and transferring range-gate data via EPP (Enhanced Parallel Port) insure operating frequency up to several kilohertz. Using the prototype circuit makes success of the experiment of high-repetition-rate Satellite Laser Ranging in Shanghai Astronomical Observatory
and makes it become one of stations with high-repetition-rate SLR technology in the world.