A Coupled Architecture of Multiple T  -Pipelines

Cui Guangzuo; Cheng Xu

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A Coupled Architecture of Multiple T -Pipelines

更新时间：2025-12-08

- A Coupled Architecture of Multiple T -Pipelines
- Acta Electronica Sinica Issue 5, (1999)
- 作者机构：
  
  北京大学计算机系系统结构教研室
- 作者简介：
- 基金信息：
- DOI：
  CLC： TP302
- Published：1999
- 稿件说明：
移动端阅览
[1]崔光佐,程旭.多T-Pipeline耦合结构[J].电子学报,1999(05):2-4.

Cui Guangzuo, Cheng Xu. A Coupled Architecture of Multiple T -Pipelines[J]. Acta Electronica Sinica, 1999, (5).
[1]崔光佐,程旭.多T-Pipeline耦合结构[J].电子学报,1999(05):2-4. DOI：

Cui Guangzuo, Cheng Xu. A Coupled Architecture of Multiple T -Pipelines[J]. Acta Electronica Sinica, 1999, (5). DOI：

摘要

硬件集成度的迅速提高要求与之相适应的体系结构．ＭＴＰＳ（多Ｔ－Ｐｉｐｅｌｉｎｅｓ）是以ＶＬＳＩ为基础，采用多线索技术将多条Ｔ－Ｐｉｐｅｌｉｎｅ耦合在一起形成多流水线结构．该结构分为指令准备和指令执行两部分，通过线索层次结构，准备阶段可开发线索间和线索内的更大的并行性．对ＭＴＰＳ结构的分析表明，该结构可提高执行部件的利用率和流水线的效率．

Abstract

Adaptable architecture is required for rapidly increasing density of hardware.Based on VLSI

MTPS（Multiple T -Pipelines） architecture is built by coupling multiple T -Pipelines together.This architecture is divided into two stages instruction preparation and execution.By such hierarchy

more parallelisms among threads and within thread are exploited.Analysis to MTPS indicats that both the utility of execution units and the pipeline efficiency are increased.

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