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A Distributed Parallel Algorithm for VLSI Layout Parameter Extraction
更新时间:2025-12-08
    • A Distributed Parallel Algorithm for VLSI Layout Parameter Extraction

    • Acta Electronica Sinica   Issue 5, (1999)
    • CLC: TN402;TP301.6
    • Published:1999

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  • Hu Qingsheng, Wang Xiaoyan, Zhuang Zhenquan. A Distributed Parallel Algorithm for VLSI Layout Parameter Extraction[J]. Acta Electronica Sinica, 1999, (5). DOI:

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