Design of a VLSI Implementation Oriented Off  Line  Handwritten Digit Classification System

LI Guo  xing; SHI Bing  xue

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Design of a VLSI Implementation Oriented Off Line Handwritten Digit Classification System

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- Design of a VLSI Implementation Oriented Off Line Handwritten Digit Classification System
- Acta Electronica Sinica Issue 11, (1999)
- 作者机构：
  
  清华大学微电子学研究所,北京,100084
- 作者简介：
- 基金信息：
- DOI：
  CLC： TP391.4
- Published：1999
- 稿件说明：
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[1]栗国星,石秉学.一种面向VLSI实现的脱机手写体数字识别系统的设计[J].电子学报,1999(11):144-146.

LI Guo xing, SHI Bing xue. Design of a VLSI Implementation Oriented Off Line Handwritten Digit Classification System[J]. Acta Electronica Sinica, 1999, (11).
[1]栗国星,石秉学.一种面向VLSI实现的脱机手写体数字识别系统的设计[J].电子学报,1999(11):144-146. DOI：

LI Guo xing, SHI Bing xue. Design of a VLSI Implementation Oriented Off Line Handwritten Digit Classification System[J]. Acta Electronica Sinica, 1999, (11). DOI：

摘要

本文提出了一种基于细胞神经网络（CellularNeuralNetworkorCNN）和多层感知机（MultiLayerPerceptronorMLP）构成的组合神经网络进行手写体数字识别的系统及VLSI的实现.该系统首先由CNN从归一化为20×20的字符图像的水平与垂直方向以及两个对角线上逐行进行相邻单元检测（ConnectedComponentDetectororCCD）

并把检测到的特征进行适当压缩

然后按一定的时序馈送到下一级的MLP来进行识别.MLP是一个80×20×10的具有局部互连的两层网络.它主要由神经处理单元（NeuralProcessingUnitorNPU）阵列、开关电流积分器以及电流比较器等构成.NPU的权重是可调整的

其值由反向传播学习算法事先学习好

再经过八值量化后每一个权重由四位来表示.该识别系统较为简单有效

并可直接映射成为标准数字CMOSVLSI工艺兼容的电流型电路

Abstract

A VLSI implementation oriented off line handwritten digit classification system based on cellular neural network and two layer perceptron is presented in this paper.The cellular neural network is used to extract the connected component feature of normalized 20×20 handwritten digit image.These features are fed into the two layer perceptron after proper compression in time sharing mode.The two layer perceptron has a structure of 80×20×10 with local connection and it mainly consists of a weight programmable NPU array

switched current integrator and current comparators.This classification system has a smart structure and it can be directly mapped into current mode circuits whose technology is compatible with standard digital CMOS VLSI.

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