

浏览全部资源
扫码关注微信
哈尔滨工业大学
Published:1999
移动端阅览
[1]曾平英,毛志刚,叶以正.CLA加法器混合式BIST方案[J].电子学报,1999(05):109-111.
Zeng Pingying, Mao Zhigang, Ye Yizheng. Mixed Built In Self Test Schemes for CLA Adder[J]. Acta Electronica Sinica, 1999, (5).
本文以先行进位加法器为例,将确定性测试方法与伪随机测试方法相结合,提出了实现内建自测试电路中测试生成器的、在测试时间和测试电路硬件开销之间取得折衷的几种方案.最后,比较并分析了所得结果.
Taking Carry Look Ahead adder as an example
several schemes used to implement test pattern generators in the BIST circuitb are proposed
where deterministic testing is combined with pseudo random testing.Trade off is obtained between test time and overhead of test circuit.In the end
results are compared and analyzed.
0
Views
68
下载量
2
CSCD
Publicity Resources
Related Articles
Related Author
Related Institution
京公网安备11010802024621