A kind of real-time processing algorithm for RLS(Recusive Least-Squares) adaptive filter is proposed which is very suitable for VLSI implementation. All the operations needed in the algorithm are mapped into a systolic array which is constituted by only CORDIC units. The least-square residue can be directily deduced from the array without solving the complex weights.And a full-custom 90
000 transistor ASIC for this array has been designed and manufactured with 1.2μm CMOS technology
with which a adaptive filter can be built with data sample rate of 2MHz.