A Functional Level Test Generation Method of Combinational Circuit with Critical Binary Tree

陈朝阳; 陈光禹; 虞厥邦

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A Functional Level Test Generation Method of Combinational Circuit with Critical Binary Tree

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- A Functional Level Test Generation Method of Combinational Circuit with Critical Binary Tree
- Acta Electronica Sinica Issue 8, (1996)
- 作者机构：
  
  成都电子科技大学ＣＡＴ实验室
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN707
- Published：1996
- 稿件说明：
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[1]陈朝阳,陈光禹,虞厥邦.组合电路功能级测试生成的临界二元树方法[J].电子学报,1996(08):68-71.

陈朝阳, 陈光禹, 虞厥邦. A Functional Level Test Generation Method of Combinational Circuit with Critical Binary Tree[J]. Acta Electronica Sinica, 1996, (8).
[1]陈朝阳,陈光禹,虞厥邦.组合电路功能级测试生成的临界二元树方法[J].电子学报,1996(08):68-71. DOI：

陈朝阳, 陈光禹, 虞厥邦. A Functional Level Test Generation Method of Combinational Circuit with Critical Binary Tree[J]. Acta Electronica Sinica, 1996, (8). DOI：

摘要

本文描述了电路基于呆滞型故障模型的功能级测试生成的概念及临界二元树（Ｃｒｉｔｉ－ｃａｌＢｉｎａｒｙＴｒｅｅ，ＣＢＴ）用于功能级测试生成的方法，提出了一种新的临界输入动态识别方法，以求获得较小的ＣＢＴ规模，加速测试生成过程．

Abstract

A concept of circuit functional level test generation within stuck-at fault model and a method of functional level test generation with Critical Binary Tree（CBT） are described. A novel method about critical input dynamic identification is presented. So we may obtain smaller CBT and accelerate the process of test generation.

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