A Technology Mapping Algorithm for Area Optimization under Delay Constraint

彭宇行; 陈福接

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A Technology Mapping Algorithm for Area Optimization under Delay Constraint

更新时间：2025-12-08

- A Technology Mapping Algorithm for Area Optimization under Delay Constraint
- Acta Electronica Sinica Issue 8, (1996)
- 作者机构：
  
  国防科技大学计算机研究所
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN470.2
- Published：1996
- 稿件说明：
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[1]彭宇行,陈福接.求延时限制下面积最小化工艺映射[J].电子学报,1996(08):108-110.

彭宇行, 陈福接. A Technology Mapping Algorithm for Area Optimization under Delay Constraint[J]. Acta Electronica Sinica, 1996, (8).
[1]彭宇行,陈福接.求延时限制下面积最小化工艺映射[J].电子学报,1996(08):108-110. DOI：

彭宇行, 陈福接. A Technology Mapping Algorithm for Area Optimization under Delay Constraint[J]. Acta Electronica Sinica, 1996, (8). DOI：

摘要

随着ＶＬＳＩ技术的发展，工艺映射的目标从面积最小化转向为延时限制下的面积最小化，然而，求延时限制下面积最小化工艺映射技术仅停留在近似算法阶段．本文给出求解该问题的精确算法以及有关理论结果．

Abstract

As the development of VLSI design

the target of the technology mapping has been changed into minimizing area under delay constraint from area optimization. However

there exist only near optimal algorithms for the target up to now. This paper presents a theoretical breakthrough showing that the technology mapping problem for Area Optimization under Delay Constraint can be solved optimally by our algorithm.

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P&DP Lab. National University of Defense Technology

410073

国防科技大学计算机研究所

ASIC and System State Key laboratory, Fudan University

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