Circuit Design of a 8-State 32QAM Viterbi Decoder

韩雁; 王匡; 姚庆栋

您当前的位置：

首页 >

文章列表页 >

Circuit Design of a 8-State 32QAM Viterbi Decoder

更新时间：2025-12-08

- Circuit Design of a 8-State 32QAM Viterbi Decoder
- Acta Electronica Sinica Issue 5, (1996)
- 作者机构：
  
  浙江大学ＣＡＤ＆ＣＧ国家重点实验室
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN470.2
- Published：1996
- 稿件说明：
移动端阅览
[1]韩雁,王匡,姚庆栋.8状态32QAM维特比译码器的硬件设计[J].电子学报,1996(05):99-102.

韩雁, 王匡, 姚庆栋. Circuit Design of a 8-State 32QAM Viterbi Decoder[J]. Acta Electronica Sinica, 1996, (5).
[1]韩雁,王匡,姚庆栋.8状态32QAM维特比译码器的硬件设计[J].电子学报,1996(05):99-102. DOI：

韩雁, 王匡, 姚庆栋. Circuit Design of a 8-State 32QAM Viterbi Decoder[J]. Acta Electronica Sinica, 1996, (5). DOI：

摘要

由于格状编码调制（ＴＣＭ）可以在相同的频带利用率下使信号得到２．５５～７．３７ｄＢ的编码增益，所以得到了广泛的应用。鉴于ＴＣＭ的维特比（Ｖｉｔｅｒｂｉ）译码器在ＨＤＴＶ系统实现中具有的重要作用，本文开展了对维特比译码器的硬件设计工作。探讨了在硬件实现中可能影响维特比译码器性能的诸种因素及解决途径，完成了一个具有３万门规模的８状态３２ＱＡＭ维特比译码器的ＶＬＳＩ电路设计，并通过了计算机工作站的逻辑模拟。

Abstract

Trellis Coded Modulation（TCM） has been widely used because it can obtain 2. 55 ～ 7. 37 dB coding gain without bandwidth expansion or reduction of the effective information rates. Since Viterbi Decoder（VD） plays an important role in the realization of HDTV system

we conduct the research and development on integration of VDs. This paper studies the factors which affect the performance of VDs and their solutions. A completed VLSl circuit design for an 8-state 32QAM VD（30

000 gates in scale） is also reported.

关键词

Keywords

references

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Frequency Planning and Channel Coding Of Terrestrial Digial HDTV

Related Author

Li Guangqui

姚庆栋

高永红

王志华

王建昕

董在望

Related Institution

Hangzhou Institute of Electronic Engineering, Hangzhou 310031)Yao Qingdong

浙江大学

杭州电子工业学院浙江大学

Department of Electronic Engineering., Tsinghua University

100084

⁰