Research on Design for Testability of BiCMOS Circuits

叶波; 郑增钰

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Research on Design for Testability of BiCMOS Circuits

更新时间：2025-12-08

- Research on Design for Testability of BiCMOS Circuits
- Acta Electronica Sinica Issue 8, (1995)
- 作者机构：
  
  1. 复旦大学专用集成电路与系统国家重点实验室
  2. 复旦大学电子工程系
  3. 复旦大学专用集成电路与系统国家重点实验室复旦大学电子工程系
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN450.2
- Published：1995
- 稿件说明：
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[1]叶波,郑增钰.BiCMOS电路可测性设计探讨[J].电子学报,1995(08):86-88.

叶波, 郑增钰. Research on Design for Testability of BiCMOS Circuits[J]. Acta Electronica Sinica, 1995, (8).
[1]叶波,郑增钰.BiCMOS电路可测性设计探讨[J].电子学报,1995(08):86-88. DOI：

叶波, 郑增钰. Research on Design for Testability of BiCMOS Circuits[J]. Acta Electronica Sinica, 1995, (8). DOI：

摘要

本文提出了ＢｉＣＭＯＳ电路的实用可测性设计方案，该方案与传统方法相比，可测性高，硬件花费小，仅需额外添加一个ＭＯＳ管和两个控制端，就可有效地用单个测试码测出ＢｉＣＭＯＳ电路的开路故障和短路故障，减少了测试生成时间，可广泛应用于集成电路设计中。

Abstract

The method of testability design for BiCMOS circuits is proposed.Compared with conventional methods

it has higher testability and lower cost of hardware.Only adding one extra MOS transistor and two control ports

it can effectively detect all open and short faults in BiCMOS circuits with single test vector.The method reduces the time consumed for generation and it can be widely used in iC design.

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Key Laboratory of Advanced Perception and Intelligent Conerol of High-end Eguipment, Ministry of Education, College of Electrical Engineering, Anhui Polytechnic University

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Key Laboratory of Advanced Perception and Intelligent Conerol of High-end Eguipment Ministry of Education College of Electrical Engineering Anhui Polytechnic University Wuhu Anhui China

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