Panda-Map:The Optimal Performance-Directed Logic Mapping Algorithm for TLU-Based FPGA

张阳; 张平

您当前的位置：

首页 >

文章列表页 >

Panda-Map:The Optimal Performance-Directed Logic Mapping Algorithm for TLU-Based FPGA

更新时间：2025-12-08

- Panda-Map:The Optimal Performance-Directed Logic Mapping Algorithm for TLU-Based FPGA
- Acta Electronica Sinica Issue 11, (1994)
- 作者机构：
  
  北京集成电路设计中心
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN4
- Published：1994
- 稿件说明：
移动端阅览
[1]张阳,张平.Panda－Map：真值表结构FPGA的性能驱动的逻辑映射优化算法[J].电子学报,1994(11):55-60.

张阳, 张平. Panda-Map:The Optimal Performance-Directed Logic Mapping Algorithm for TLU-Based FPGA[J]. Acta Electronica Sinica, 1994, (11).
[1]张阳,张平.Panda－Map：真值表结构FPGA的性能驱动的逻辑映射优化算法[J].电子学报,1994(11):55-60. DOI：

张阳, 张平. Panda-Map:The Optimal Performance-Directed Logic Mapping Algorithm for TLU-Based FPGA[J]. Acta Electronica Sinica, 1994, (11). DOI：

摘要

基于真值表ＴＬＵ（ＴａｂｌｅｏｆＬｏｏｋ－Ｕｐ）结构的ＦＰＧＡ（ＦｉｅｌｄＰｒｏｇｒａｍｍａｂｌｅＧａｔｅＡｒｒａｙ）在各种ＦＰＧＡ结构中占有越来越重要的地位。但迄今为止各种针对ＴＬＵＦＰＧＡ的逻辑映射算法都无法实现对面积和延迟的折衷考虑：不是只考虑面积优化，就是只考虑延迟优化，本文提出并实现了进行面积和延迟折衷的性能驱动的逻辑映射优化算法：Ｐａｎｄａ－Ｍａｐ，它是对面积驱动的Ｃｈｏｒｔｌｅ－ｃｒｆ［７］及延迟驱动的Ｃｈｏｒｔｌｅ－ｄ［６］的较大改进，并且Ｐａｎｄａ－Ｍａｐ采用了一种新的启发性算法将组合网络分割成若干个单输出子网络。

Abstract

With TLU-based FPGA becoming more and more popular

various specific logic mapping algorithms have emerged for either area optimization or delay optimization. But until now there is no good logic mapping solution for the trade-off between area consideration and delay consideration. In this paper

we present an improved algorithm for above problem

which also adopts a novel heuristic algorithm to partition the DAG into single-output sub-DAGs.

关键词

Keywords

references

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Operator Fusion Method and Hardware Architecture Design Based on Non-Standard Operators

Multi-Hop Clock Synchronization Algorithm and System Implementation Based on IEEE 802.1AS

An Improved Attention Mechanism Algorithm Model and Hardware Aceleration Design Method

Verification of FPGA Encryption Protection Design Based on Laser Injection

Design and Optimization of Target Detection Accelerator Based on Winograd Algorithm

Related Author

WANG Ying

GAO Lan

ZHANG Zhe

LIU Xin

WU Yi-xiong

ZHANG Wei-gong

ZHAO Guo-feng

WEI Rui-peng

Related Institution

College of Information Engineering, Capital Normal University

School of Mathematical Science, Capital Normal University

Faculty of Software Technologics, Shanxi Agricultural University

School of Communications and Information Engineering， Chongqing University of Posts and Telecommunications

College of Information Engineering， Capital Normal University

⁰