Nerual Network Model for Logic Circuits

Zhang Zhong

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Nerual Network Model for Logic Circuits

更新时间：2025-12-08

- Nerual Network Model for Logic Circuits
- Acta Electronica Sinica Issue 8, Pages: 77-81(1993)
- 作者机构：
  
  1. 中国科学院自动化研究所
  2. 中国科学院计算技术研究所北京100080
- 作者简介：
- 基金信息：
- DOI：
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- Published：1993
- 稿件说明：
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[1]张中,魏道政.逻辑电路神经网络模型[J].电子学报,1993(08):77-81.

Zhang Zhong. Nerual Network Model for Logic Circuits[J]. Acta Electronica Sinica, 1993, (8): 77-81.
[1]张中,魏道政.逻辑电路神经网络模型[J].电子学报,1993(08):77-81. DOI：

Zhang Zhong. Nerual Network Model for Logic Circuits[J]. Acta Electronica Sinica, 1993, (8): 77-81. DOI：

摘要

本文采用Hopfiold神经网络模型

从基本逻辑器件的真值表出发

建立其能量约束方程组

利用线性方程组理论推导出逻辑器件神经网络模型存在的充分必要条件

并由此得到基本逻辑门神经网络参数的一般表达式.

Abstract

In this paper

on the basis of truth table of a logic device

the constrained energy equations are established by use of Hopfield model. By using linear equations theory

the necessary and sufficient condition for the existence of its neural network is achieved

from which a general neural parameter expression for any one gate is obtained.

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