A Method of VLSI Timing Driven Placement

Yan Xiaolang; Qi Xiaoning

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A Method of VLSI Timing Driven Placement

更新时间：2025-12-08

- A Method of VLSI Timing Driven Placement
- Acta Electronica Sinica Issue 2, Pages: 28-33(1993)
- 作者机构：
  
  1.   杭州电子工业学院CAD研究所
  2.   机电部第五研究所杭州 310037
  3.   广州 510610
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：1993
- 稿件说明：
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[1]严晓浪,戚肖宁,金玲.一种时延驱动的VLSI布局方法[J].电子学报,1993(02):28-33.

Yan Xiaolang, Qi Xiaoning. A Method of VLSI Timing Driven Placement[J]. Acta Electronica Sinica, 1993, (2): 28-33.
[1]严晓浪,戚肖宁,金玲.一种时延驱动的VLSI布局方法[J].电子学报,1993(02):28-33. DOI：

Yan Xiaolang, Qi Xiaoning. A Method of VLSI Timing Driven Placement[J]. Acta Electronica Sinica, 1993, (2): 28-33. DOI：

摘要

时廷特性对于高性能的超大规模集成电路（VLSI）来讲是十分重要的。本文提出了一个新的时延驱动的布局方法。在初始布局中

我们提出了给线网加权的新方法

在迭代改善布局中提出了等位场的概念。实验结果表明:这是一种有效的时延驱动布局方法。

Abstract

Timing performance is important to high performance VLSI. This paper pre sents a new method of timing driven placement. In initial placement we propose a new way giving weights to the nets

and in iterative placement

we present a concept called Equal Position Field. The experiment results show that this is an efficient method of timing driven placement.

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