A Programable FFT Array Processor

Yan Ming-sheng; Mao Yu-hai

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A Programable FFT Array Processor

更新时间：2025-12-08

- A Programable FFT Array Processor
- Acta Electronica Sinica Issue 4, Pages: 12-18(1989)
- 作者机构：
  
  清华大学无线电系
- 作者简介：
- 基金信息：
- DOI：
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- Published：1989
- 稿件说明：
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[1]阎鸣生,茅于海.可编程FFT阵列处理器[J].电子学报,1989(04):12-18.

Yan Ming-sheng, Mao Yu-hai. A Programable FFT Array Processor[J]. Acta Electronica Sinica, 1989, (4): 12-18.
[1]阎鸣生,茅于海.可编程FFT阵列处理器[J].电子学报,1989(04):12-18. DOI：

Yan Ming-sheng, Mao Yu-hai. A Programable FFT Array Processor[J]. Acta Electronica Sinica, 1989, (4): 12-18. DOI：

摘要

本文提出了一种高度可编程的FFT阵列处理器、其阵列单元为2

处理的点数为2

。采用4个单元的FFT阵列处理器可以使1024点的复数FFT（或IFFT）在519μS内完成。采用块浮点、12位字长的四单元FFT和四单元IFFT的阵列处理器已采用位片技术硬件实现

并用于雷达信号的实时处理。

Abstract

A highly programable digital FFT array processor has been proposed in this paper. The number of unit is M = 2S

and the transform length is N = 2r. The 1024 points complex FFT （or IFFT）could be calculated in 519 μs by 4 units array FFT processor.The architecture roposed in the paper can solve the problems of communications between the arithmetic unit

and the generations of the address of data and coefficients. The hardware of 4 units processor of FFT and IFFT has been implemented and be using in real time radar signal processing.

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