Some Applications of Multiple-Valued Logic to the Designand Test of VLSI

Hu Mou

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Some Applications of Multiple-Valued Logic to the Designand Test of VLSI

更新时间：2025-12-08

- Some Applications of Multiple-Valued Logic to the Designand Test of VLSI
- Acta Electronica Sinica Issue 6, Pages: 92-97(1989)
- 作者机构：
  
  上海铁道学院计算机工程系
- 作者简介：
- 基金信息：
- DOI：
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- Published：1989
- 稿件说明：
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[1]胡谋.多值逻辑在VLSI设计与测试中的若干应用[J].电子学报,1989(06):92-97.

Hu Mou. Some Applications of Multiple-Valued Logic to the Designand Test of VLSI[J]. Acta Electronica Sinica, 1989, (6): 92-97.
[1]胡谋.多值逻辑在VLSI设计与测试中的若干应用[J].电子学报,1989(06):92-97. DOI：

Hu Mou. Some Applications of Multiple-Valued Logic to the Designand Test of VLSI[J]. Acta Electronica Sinica, 1989, (6): 92-97. DOI：

摘要

本文介绍了多值逻辑在VLSI设计与测试中的若干应用。包括可作为VLSI模拟、设计与分析工具的ECSA理论;改进VLSI可测试性设计的三值扫描设计;具有自校验性能的三中取二值逻辑系统以及基于三值逻辑的制入测试技术。这些多值逻辑技术为VLSI的设计与测试提供了新的工具与途径。

Abstract

Several applications of multiple-valued logic to the design and test of VLSI circuits are presented. The main contents include: the ECSA theory which can be used as a tool for simulation

design and analysis of VLSI

a ternary scan design which improves the testability design of VLSI

a built-in test technique based on ternary logic and the 2-of-3-valued logic system which provides a self-checking property. These multiple-valued logic techniques provide new tools and approaches for the design and test of VLSI.

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