Design and Test Generation Algorithm for Easily Testable Circuits

Mao Weiwei; Ling Xie-ting

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Design and Test Generation Algorithm for Easily Testable Circuits

更新时间：2025-12-08

- Design and Test Generation Algorithm for Easily Testable Circuits
- Acta Electronica Sinica Issue 2, Pages: 125-128(1986)
- 作者机构：
  
  复旦大学电子工程系上海
- 作者简介：
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- DOI：
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- Published：1986
- 稿件说明：
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[1]茅巍巍,凌燮亭.易测电路的构成及其测试生成算法[J].电子学报,1986(02):125-128.

Mao Weiwei, Ling Xie-ting. Design and Test Generation Algorithm for Easily Testable Circuits[J]. Acta Electronica Sinica, 1986, (2): 125-128.
[1]茅巍巍,凌燮亭.易测电路的构成及其测试生成算法[J].电子学报,1986(02):125-128. DOI：

Mao Weiwei, Ling Xie-ting. Design and Test Generation Algorithm for Easily Testable Circuits[J]. Acta Electronica Sinica, 1986, (2): 125-128. DOI：

摘要

本文提出一种将任意组合电路转变为易测电路的方法和易测电路的测试生成算法。对电路中所有引线的单固定故障都能产生测试向量。测试生成所需的计算量的上限是2（n

+4n

）

。

Abstract

A method to convert an arbitrary combinational circuit into an easily testable circuit and a test generation algorithm for easily testable circuits are presented. Test patterns to detect single stuck at fault of all lines in the circuit can be generated. The upper bound of the magnitude of computation for test generation is 2（n1 + 4n2）2.

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